Live
- Karnataka Chief Minister Siddaramaiah Offers Condolences To Grieving Father Of Stabbing Victim
- BJP winning 35 seats in Bengal will guarantee freedom from illegal infiltration: Amit Shah
- Assault Incident In Karnataka Sparks Controversy Amidst Rising Tensions
- Only 6 minutes’ role in 222 days at Parliament
- CM Kejriwal, K Kavitha’s judicial custody extended in money laundering case till May 7
- Women BJD leaders Raseswari, Simarani quit party
- BJP overlooked TG projects in Parliament: Manne Srinivas
- Nothing Phone 3 with Model Number A015 May Launch in July
- Allari Naresh’s ‘Aa Okkati Adakku’ trailer promises hilarious family entertainment
- Hanuman Jayanthi special: Prasanth Varma unveils new poster of ‘Jai Hanuman’
IISc collaborates with Samsung R&D to study electrostatic discharge
IISc collaborates with Samsung R&D to study electrostatic discharge
The Samsung Semiconductor India Research (SSIR), a subsidiary of Samsung Electronics, and the Indian Institute of Science (IISc) have teamed up to pursue research and development (R&D) in the area of on-chip Electrostatic Discharge (ESD) protection.
Bengaluru: The Samsung Semiconductor India Research (SSIR), a subsidiary of Samsung Electronics, and the Indian Institute of Science (IISc) have teamed up to pursue research and development (R&D) in the area of on-chip Electrostatic Discharge (ESD) protection. ESD is the sudden and brief flow of electric current between two electrically charged objects. In order to safeguard ultra-high-speed serial connections in cutting-edge Integrated Circuits (ICs) and system-on-chip (SoC) products, the collaboration aims to develop cutting-edge ESD device solutions, according to IISc.
The connected research will be conducted by Prof. Mayank Shrivastava's group at IISc's Department of Electronic Systems Engineering (DESE), and the results of this study will be implemented in Samsung's advanced process nodes.
"ICs and SoCs are necessary for almost every system we encounter, little or large, but they are particularly vulnerable to ESD failures when made using modern nanoscale CMOS (Complementary Metal Oxide Semiconductor) technologies. ESD failures are to blame for the bulk of IC chip failures and field returns," according to IISc, which provided background information for such R&D.
IISc asserted that ESD-related technology is a rare expertise and that business owners that are skilled at designing ESD protection devices and interface concepts dominate the market. As a result, R&D in ESD technology is essential to the semiconductor industry's effort to develop highly dependable interfaces and SoCs that run at low power and high speed.
One of the few universities worldwide leading ESD device research is IISc. "We are pleased to collaborate with IISc to promote semiconductor innovation and to develop ESD knowledge in addition to the skills offered by IISc. Our objective is to boost capacity building through postgraduate training programmes, provide students with opportunity to complete industry internships, and support young researchers' entrepreneurial endeavours," said SSIR MD Balajee Sowrirajan, IISc.
